Comparison of Dielectric Loss in Titanium Nitride and Aluminum Superconducting Resonators

Lossy dielectrics are a significant source of decoherence in superconducting quantum circuits. In this report, we model and compare the dielectric loss in bulk and interfacial dielectrics in titanium nitride (TiN) and aluminum (Al) superconducting coplanar waveguide (CPW) resonators. We fabricate isotropically trenched resonators to produce a series of device geometries that accentuate a specific dielectric region's contribution to resonator quality factor. While each dielectric region contributes significantly to loss in TiN devices, the metal-air interface dominates the loss in the Al devices. Furthermore, we evaluate the quality factor of each TiN resonator geometry with and without a post-process hydrofluoric (HF) etch, and find that it reduced losses from the substrate-air interface, thereby improving the quality factor.

Lossy dielectrics are a significant source of decoherence in superconducting quantum circuits. In this report, we model and compare the dielectric loss in bulk and interfacial dielectrics in titanium nitride (TiN) and aluminum (Al) superconducting coplanar waveguide (CPW) resonators. We fabricate isotropically trenched resonators to produce a series of device geometries that accentuate a specific dielectric region's contribution to resonator quality factor. While each dielectric region contributes significantly to loss in TiN devices, the metal-air interface dominates the loss in the Al devices. Furthermore, we evaluate the quality factor of each TiN resonator geometry with and without a post-process hydrofluoric (HF) etch, and find that it reduced losses from the substrate-air interface, thereby improving the quality factor. Dielectric loss from material interfaces limit performance in superconducting quantum devices. [1][2][3][4][5][6][7][8][9][10] The magnitude of dielectric loss at these interfaces is determined by the materials and processes used to fabricate the devices. As such, it is imperative to develop a quantitative framework to understand how the loss at interfaces is affected by the choice of superconducting metal and subsequent fabrication steps. Significant work has focused on identifying which regions of a device may most strongly limit performance by modeling their electric field participation. 8,11,12 Separately, many reports have compared the performance of devices constructed using different materials or fabrication processes. [13][14][15][16][17][18][19] By combining these ideas, differences in quality factor can be directly attributed to loss in specific dielectric regions, enabling further data-driven improvements to device performance.
In this work, we use the surface-loss extraction (SLE) process, outlined in Ref. 10, to model the dielectric regions of TiN and Al superconducting resonators and calculate the loss tangents of these regions based on the measured quality factors. We find that the metal-air interface of the Al resonators is an order of magnitude more lossy than for TiN resonators. We also used a postprocess HF etch to reduce the loss in the TiN devices and applied the SLE process to attribute the reduction specifically to the substrate-air interface.
We differentiate four dielectric regions from which we can extract a loss tangent (see Fig. 1): the metalsubstrate interface (MS), the substrate-air interface (SA), the metal-air interface (MA), and the silicon substrate (Si). Two-level-system (TLS) defects in these dia) alexander.melville@ll.mit.edu; These authors contributed equally to this work. electric regions limit the quality factor of a resonator to where p r is the geometry-dependent electric field participation ratio and tan δ r is the loss tangent of dielectric region r. By measuring the quality factor, Q, of a set of four specific resonator geometries with a distinct distribution of participation values, 20 we numerically solved for the loss factor of each dielectric region, 10 which we then convert to a loss tangent using a reasonable set of assumptions about the dielectric constant and layer thickness. 21 The four geometries were each designed to accentuate participation in one of the four dielectric regions relative to the others. Therefore, we refer to the geometries as "MS design," "SA design," "MA design," and "Si design," corresponding to the dielectric region being emphasized. All geometries were isotropically trenched. The trench depth (d) and degree of undercutting (u), along with the resonator width (w) and gap (g), set the interface participation ratios. For example, the MS design was shallowly trenched with a narrow width and gap, while the SA (Si) designs were deeply trenched with narrow (wide) widths and gaps. The MA design was deeply trenched with the resonator mostly suspended. 10 All resonators were fabricated on high resistivity 8" Si(001) substrates (>3,500 Ω-cm, Siltronic AG) that were prepared using the RCA clean prior to metal deposition. For the Al, the silicon wafers were also cleaned with an aqueous solution of 1% hydrofluoric acid (HF) to remove the native oxide prior to deposition. The 750-nm-thick TiN films were deposited in a DC reactive-magnetron sputtering tool (background pressure < 2 × 10 −8 Torr), and the 250-nm-thick Al films were deposited in a molecular-beam epitaxy deposition tool (background pressure < 8 × 10 −11 Torr). The resonator patterns were defined with optical lithography, and the TiN metal was etched with a plasma formed from a combination of BCl 3 and Cl 2 gasses, whereas the Al metal was etched with a commercial acid etchant. After the resonator patterns were etched, we used an SF 6 plasma to isotropically etch the silicon trenches. 10 Since only the duration of the SF 6 plasma etch is varied between resonator designs, we assume that the loss tangent of each dielectric region in TiN is the same for all geometries. We similarly assume the loss tangent of each dielectric region in Al is the same for all geometries. The TiN device chips without the post-process HF etch came from different wafers than the chips that received the post-process HF etch. Consequentially, the post-etch resonator geometries varied slightly between wafers, which we accounted for by simulating device-specific participation ratios informed by cross-sectional scanning electron micrographs (SEM). All of the Al device chips were taken from the same wafers, and therefore we used the same participation ratios for each set of Al devices. Device chips for the post-process HF etch were etched with a 1% HF acid solution for approximately 30 seconds to strip the oxides from the surface and then rinsed in deionized water. All device chips were mounted in gold-plated copper packages. The HF-etched chips were loaded into the dilution fridge and pumped down to the millitorr range within 2-3 hours of exposure to atmosphere after the etch X-ray photoemission spectroscopy (XPS) scan of a representative TiN resonator chip's silicon surface before (orange) and after (blue) the post-process HF treatment. The scans were offset to highlight the reduction in the intensity of the oxygen peaks resulting from the HF etch, indicating the removal of the native silicon oxide.
to minimize reformation of the native oxides.
Representative resonator chips were characterized by X-ray photoemission spectroscopy (XPS) before the postprocess HF etch (orange line in Fig. 2) and approximately one hour after the post-process HF etch (blue line in Fig.  2). The delay between the post-process HF etch and the XPS scans approximates the time between the postprocess HF etch and bringing the devices under vacuum in the dilution fridge. As expected, the oxygen peaks significantly diminished after the HF etch, indicating an effective removal of silicon oxide. In both the Al and TiN metal surfaces, the oxygen peaks were qualitatively unchanged, 20 suggesting the oxide was reformed faster than the timescale of the experiment. 23,24 Many previous reports have linked dielectric loss to surface oxides, 3,8,25 so we expect that the observed decrease in surface oxides on silicon would result in a decreased substrate-air interface loss tangent after the post-process HF etch.
To determine the loss tangents, we measured between 10 and 50 resonators of each material and geometry, with and without the post-process HF etch, as a function of circulating microwave power to find the high power (n p ∼10 6 ) and single-photon power (n p ∼1) internal quality factors, Q HP and Q LP , respectively. We used these to isolate the TLS-limited quality factor, Q TLS , 10,26 defined as We determined the loss tangent values, tan δ r , by applying the SLE Monte Carlo simulation with N = 10,000, using each device set's participation matrix and the Q TLS values. 10 The goodness-of-fit of the SLE process is shown in Fig. 3, where we plot the measured Q TLS against the predicted Q TLS . The y values correspond to the mean Q TLS for each geometry, and the vertical error bars correspond to the standard error of the measured samples. The x values correspond to the mean Q TLS calculated ac-cording to Eqn. 1 using the participation matrix and the SLE loss tangents. The horizontal error bars are twice the standard deviation of the calculated quality factors. The mean and standard deviation of the specific loss tangents determined by the SLE process are given in Table I, using the dielectric constants and thicknesses in Ref. 21. For some regions, e.g., the substrate-air interface for Al, the standard deviation of the loss tangent was much larger than the mean, which we interpreted as the loss tangent being too low to resolve due to the uncertainty in the SLE process given the accessible geometries. Our limited ability to deconvolve the participation of the MS or SA regions relative to the other dielectric regions is one source of uncertainty in the SLE process, which disproportionately affects the metal-substrate (MS) and substrate-air (SA) interfaces compared to the metal-air (MA) interface and the substrate (Si). We also observed greater uncertainty in the SLE process for dielectric regions that minimally affect the total device loss. These effects are apparent in the determination of the TiN substrate-air loss tangent after the post-process HF etch. In the cases where the loss tangent was obscured by the uncertainty, we report the upper bound of the loss tangent for these regions instead of the mean. The metal-substrate and substrate-air upper bounds were set by calculating the highest possible loss tangent consistent with the measured Q TLS for the MS design and SA design, respectively. 20 For both TiN and Al, we found that the loss tangent for the silicon dielectric region is the same within the error bars, as we expected given that (1) the properties of bulk silicon should not change from the fabrication process and (2) the silicon was sourced from the same vendor for all samples. The Si loss tangent we extract is also consistent with other values reported in literature. [10][11][12] The most significant material-dependent difference was the loss tangent of the metal-air interface; it is an order of magnitude higher in Al than in TiN. We attribute this to a lossier and thicker aluminum oxide compared to the relatively thin oxide that forms on TiN. 10,24,27,28 While precise quantitative determination of the metal-substrate and substrate-air loss tangents was not possible in the Al devices, the upper bounds that we set are comparable to their counterparts in TiN without the post-process HF etch.
The only loss tangent that significantly changed due  For each test set, the measured QTLS is plotted against the QTLS calculated from the participation matrix and the model's loss tangents. Red vertical error bars correspond to the standard error of the measured QTLS, and blue horizontal error bars correspond to twice the standard deviation of the calculated quality factors. The green line represents perfect agreement between the measured QTLS and the predicted QTLS.
to the post-process HF etch was for the substrate-air interface in TiN, consistent with the expected reduction of silicon oxide at that interface. Although a similar reduction of oxides on the silicon surface occurred in the Al resonator chips from the post-process HF etch, the substrate-air loss tangent was already below the noise floor for Al without the post-process HF etch, and we would not expect to resolve changes to it. In Fig. 4, we plot the effect of the post-process HF etch for each geometry in TiN by comparing the total measured dielectric loss, Q −1 TLS , with the calculated dielectric loss from the substrate-air interface. For most geometries, the observed reduction in loss is proportional to the participation ratio of the substrate-air interface. The most significant reductions were observed in the MS and SA designs, corresponding to a decrease of over 50% in the total measured dielectric loss, and an increase in the overall device performance as determined by the single-photon power internal quality factor, Q LP . The Q LP for the MS and SA designs increased from 8.6 × 10 5 and 8.0 × 10 5 to 1.3 × 10 6 and 2.1 × 10 6 , an increase of 50% and 160%, respectively, over the untreated devices. A similar reduction in loss was not observed for the MA design, because the difference in the participation ratio due to the wafer-to-wafer etch variation between the TiN MA designs obscured the impact of the reduced substrate-air loss tangent on total dielectric loss in that geometry.
In summary, we demonstrated the use of the SLE process developed in Ref. 10 to quantitatively compare the dielectric loss of superconducting quantum devices made of different materials and fabrication processes. We found that the Al metal-air interface was ∼10× lossier than the TiN metal-air interface. By characterizing the loss at different interfaces, we could strategically target a particularly lossy interface (SA) for improvement. We used a post-process HF etch to reduce the native oxide at that interface, which reduced the substrate-air loss tangent and resulted in more than a 2× increase of the single-photon quality factor compared to untreated devices.

Supplemental Information Participation Matrices
The participation values used in the main text are given below in the Tables S1-S4.

X-ray Photoemission Spectroscopy
Representative X-ray photoemission spectroscopy (XPS) scans of samples made with the fabrication processes used in the main text are given below in Fig. S1.

Upper Bounds Calculation
When the surface-loss extraction process yielded an average loss tangent value of a dielectric region, µ tan δr , that was much smaller than the standard deviation, σ tan δr , we interpreted that as the loss tangent being too low to resolve due to the uncertainty of the model. The algorithm for finding that upper bound is described here. For a given dielectric region, the upper bound was defined as the value for the loss tangent, which, when added to the loss from the minimum value of the other dielectric regions' loss tangents, µ tan δr − 2σ tan δr , would result in the highest loss observed in the total measured dielectric loss, µ Q TLS − σ X , where µ Q TLS is the average total measured dielectric loss and σ X is the standard error of the measured resonators. For example, in the case of the TiN devices with a post-process HF etch, the upper bound for the loss tangent of the substrate-air interface was determined by the equation below.

Aluminum Loss
In Fig. S2, we plotted the effect of the post-process HF etch for each geometry in Al by comparing the total measured dielectric loss, Q −1 TLS , with the calculated dielectric loss from the metal-air interface. The metal-air interface loss dominates in all designs.  Figure S2: The gray bars represent the measured dielectric loss (Q −1 TLS ) for each geometry for Al, with and without the post-process HF etch. The pink bar within each segment represents the predicted loss ascribed to the metal-air interface. The black arrows indicate the data corresponding to the effect of the post-process HF etch.