Stability of spin XOR gate operation in silicon based lateral spin device with large variations in spin transport parameters

We investigate stability of the spin exclusive or (XOR) gate operation in silicon(Si) -based lateral spin devices whose spin transport properties have large variations. The optimum charge current, I 0 , for the spin XOR gate operation is calculated by using the one dimensional spin-drift-diffusion model with variable spin polarization, interface resistance of the ferromagnetic contact, channel length and channel conductivity. I 0 is strongly modulated by changing the spin transport parameters particularly under the condition with small spin polarization and short channel length. In contrast, I 0 shows constant value irrespective of the interface resistance of one ferromagnetic contact under spin extraction condition. Our results provide a device design guideline for the robust spin XOR gate operation. gates operated by spin accumulation

Logic gates operated by spin accumulation have been expected to be beyond complementary metal oxide semiconductor (CMOS) architectures. [1][2][3][4][5] In particular, a semiconductor based universal magnetologic gate (MLG) is promising because it enables a logic gate whose function can be reconstructed with a clock frequency. 2,6,7 The reconfigurable NAND/OR gate set by the magnetic configuration is realized only by using one MLG. Recently we demonstrated the spin XOR gate in silicon(Si)-based lateral spin valves (LSVs) at room temperature, which is a fundamental technique for the MLG. 7 A theoretical calculation by using the one dimensional spin-drift-diffusion model that takes the spin drift effect into consideration successfully explained the obtained features. However, several devices showed different behaviors from the designed ones in the spin XOR gate operation, e.g. a quite large charge current to realize the spin XOR gate. Since a considerable number of MLGs are integrated in the practical use, such a variation in spin XOR gate properties becomes a serious obstacle. In the practical devices, several spin transport properties such as spin polarization, spin diffusion length, conductivity of the channel and interface resistance are expected to have a finite variation. Therefore, it is worth to reveal the tolerable range of each parameter. In this study, we report such a variation of properties in the spin XOR gate in the practical LSVs and investigate theoretically the stability of the spin XOR gate operation against the variation of spin transport parameters.
Silicon-on-insulator substrates, consisting of 100-nm-thick Si(100) layer/200-nm-thick buried SiO 2 layer/625-μm-thick Si(100) substrate, were employed for fabrication of nondegenerate Si-based LSVs for spin XOR gate operation. The conductivity of the Si channel (σ Si ) was 1.93 × 10 3 (Ωm) −1 at 300 K. A 20-nm-thick highly doped silicon (n + -Si) epitaxial layer was grown by magnetron sputtering to suppress the depletion layer thickness. Au (3.0 nm)/Fe (12.4 nm)/Co (0.6 nm)/MgO (0.8 nm) layers were subsequently deposited on the Si channel by molecular-beam epitaxy. Fig. 1 of the ferromagnetic layers, a Si spin channel with three FM contacts (FM-A, FM-B and FM-M) was fabricated by using Ar + ion milling. In this process, a 25-nm-thick Si layer in the channel region was also etched to remove the n + -Si layer. Finally, two outer nonmagnetic electrodes (NM1 and NM2) were fabricated. The detailed procedures for device fabrication are described elsewhere. [8][9][10][11] In the spin XOR gate operation, a direct charge current (dc) I was applied between FM-A and FM-B and the spin accumulation voltage, V XOR was measured between FM-M and NM2. The magnetization configuration of FM-A and FM-B was controlled by application of the The center-to-center distances between adjacent electrodes (d AB and d BM ) were d AB = 11.4 μm and d BM = 1.5 μm. All measurements were carried out at 300 K using a commercial DC source meter and a digital multimeter.
In the theoretical calculation of the spin accumulation voltage, we employed a phenomenological spin-drift-diffusion equation for nondegenerate semiconductors with modulated spin transport length due to the spin drift effect. 12,13 The upstream (downstream) spin transport length scale, λ u(d) , is expressed as following equation: where e(<0), E, k B and λ Si , is the electric charge, the electric field, the Boltzmann constant and the spin diffusion length in the nondegenerate Si. 12,14,15 From boundary condition of the spin dependent electrochemical potential and spin current, spin accumulation voltage at FM-M was calculated.
show the theoretically expected V XOR as a function of magnetic flux density, By at I < I 0 , I = I 0 , and I > I 0 , where I 0 is an optimum charge current for the spin XOR gate operation. Current voltage configuration is shown in Fig. 1(a). Here, we suppose that the magnetization switching field of FM-M is designed to be higher than those of FM-A and FM-B and fixed along the +y direction during the measurements. In the following, we label the  Fig. 1(b). In contrast, when the optimum electric field is applied, majority spins transported from FM-A are increased and spin accumulation in the Si channel underneath the FM-B and FM-M becomes zero, resulting in V ↑↑ = V ↓↓ (Fig. 1(c)), which is an optimum condition for the spin XOR gate. Hereafter, we focus on V ↓↓ -V ↑↑ to find the I 0 condition. Positive (Negative) V ↓↓ -V ↑↑ indicates insufficient (excessive) spin drift effect. At I 0 condition, the hysteresis signal shows three-voltage levels as shown in Fig. 1(c). Figures. 1(e) and 1(f) show V XOR -By curves at various charge currents for (e) device A, (f) device B. Device A and B were designed with the same geometric device size. The positive and negative V ↓↓ -V ↑↑ at I = 0.1 mA and 0.5 mA in Fig. 1(e) indicates the insufficient (excessive) spin drift effect, respectively. By adjusting the spin drift effect, a clear spin XOR gate signal, i.e., V ↓↓ -V ↑↑ ≃ 0 V is obtained at I = 0.3 mA for device A. In the one dimensional spin-drift-diffusion model, I 0 is calculated to be 0.15-0.20 mA at σ Si = 1.93 × 10 3 (Ωm) −1 and spin diffusion length, λ Si = 1.50 μm, which is consistent with that of device A. In contrast, the spin XOR gate signal was obtained around I = 1.2 mA in device B, considerably large value compared to those of device A and the theoretical calculation. Because positive V ↓↓ -V ↑↑ are obviously obtained at I = 0.5 mA, I 0 condition is estimated to be much larger than that in device A. In the practical use of MLG, I 0 condition should be adjusted to the same value for multiple operation. Therefore, it is worth to reveal dominant factors which strongly modulate the I 0 condition. Fig. 2(a) shows a color contour plot of α = |V↓↓−V↑↑| |V↑↓−V↓↑| calculated by the one dimensional spin-drift-diffusion model, as a function of both I and the spin polarization of FM-B, P B . The spin polarization of FM-A, P A was constant and set to (a) 0.05, (b) 0.1, and (c) 0.2, respectively. The conductivity and the spin diffusion length in the Fe electrodes, σ Fe and λ Fe , were set to 1.0×10 7 (Ωm) −1 and 3.0 nm, respectively. σ Si , λ Si , d AB and d BM were set to 1.93×10 3 (Ωm) −1 , 1.50 μm, 11.4 μm and 1.50 μm, respectively. The interfacial resistancearea product of FM-A and FM-B (R int.A , R int.B ) were both 1.00×10 -8 Ωm 2 , close to the experimentally obtained value. Red and orange regions exhibit the condition that satisfies α ≤ 0.01 and 0.01 < α ≤ 0.04, respectively. In these conditions, we recognize a successful spin XOR gate operation because we can easily distinguish between three different states i.e., V ↑↑ ≃V ↓↓ , V ↓↑ and V ↑↓ . For 0 < P B < 0.1, I 0 condition steeply changed and the tolerable I range i.e., red and orange regions was relatively narrow. When P B is changed from 0.02 to 0.04, I 0 is changed from 0.19 to 0.24 mA for P A = 0.1. Such a large modulation of I 0 impedes a stable operation of the spin XOR gate. In contrast, for 0.1 < P B , change of I 0 condition with increasing P B gradually reduced and the tolerable I range became wider at high P B region. Such a behavior becomes pronounced for P A = 0.2. For example, a successful spin XOR gate operation is realized at constant I (0.45 mA) even though P B is varied from 0.16 to 0.19 for P A = 0.1 and from 0.31 to 0.38 for P A = 0.2. Therefore, reliable spin XOR gate operation is easily realized at large P A and P B . In the case of negative P B , there were no I 0 conditions. The expected hysteresis feature of V XOR -By curve is shown in the inset of Fig. 2(a). Although the obtained hysteresis feature at negative P B might be useful for another spin logic gate, it is not useful for the MLG. Next, we focus on the imperfectness of the device geometry. Fig. 2(d) shows a color contour plot of α as a function of both I and d AB . P A and P B were set to 0.1. The other parameters, e.g. σ Fe , λ Fe , σ Si , λ Si , and d BM were the same with those in Figs. 2(a)-2(c). I 0 condition steeply changed by changing d AB especially in the small d AB range. In contrast, the modulation is suppressed at large d AB and tolerable area i.e., red and orange area is also expanded, indicating an easy adjustment of I 0 condition at large d AB . In the previous study we demonstrated the spin XOR gate operation with d AB = 21.0 μm, 7 which enable us to fabricating additional ferromagnetic electrodes between FM-A and FM-B. The results shown in Fig. 2(d) indicates that a large d AB not only provides a flexibility of the device design for the logic gate but also provides a stability of the spin XOR gate. When we assume that error of d AB from the designed device shown in Fig. 1 is ±100 nm, modulation of I 0 condition is calculated to be ±0.003 mA, negligibly small value. Therefore, variation of d AB is not an important factor in this study. From the viewpoint of integration degree of the devices and the energy consumption for the operation, however, a small d AB is desired. In such a case, d AB becomes a crucial factor determining the properties of the spin XOR gate. A color contour plot of α as a function of both I and σ Si is shown in Fig. 2(e). The other parameters were the same with those in Figs. 2(a)-2(d). I 0 condition is also changed by changing the σ Si mainly because modulation of the spin drift effect. In contrast to P B and d AB , I 0 linearly increases with increasing σ Si , indicating a precise control of σ Si is desired for all σ Si region.
Next, we focus on the interface resistance of FM-A and FM-B. The interface resistance in a ferromagnetic metal/semiconductor hetero structure is a dominant factor which determine the spin injection efficiency from ferromagnetic layer into semiconductor, well known as the spin resistance mismatch problem. 16,17 Color contour plots of α as a function of both I and the interfacial resistance-area product are shown in Figs. 3(a) and 3(b), where variable value is (a) R int. A and (b) R int. B . The constant value of R int. B in Fig. 3(a) and R int. A in Fig. 3(b) were set to 1.00×10 -8 Ωm 2 . In Fig. 3(a), whereas I 0 is almost constant for R int. A > 1.00×10 -9 Ωm 2 , it is gradually increased with decreasing the R int. A for R int. A < 1.00×10 -9 Ωm 2 . This behavior is simply understood as a result of the spin resistance mismatch problem and consistent with our previous results. 18 In contrast, I 0 condition is constant irrespective of R int. B as shown in Fig. 3(b). Such a difference in the I 0 behavior between variable R int. A and R int. B is caused by difference in geometry with respect to FM-M and the spin drift effect i.e., modulation of the spin transport length by electric field. 12,14,15 There are two mechanisms of spin transport in a semiconductor: the spin diffusion and the spin drift. The spin diffusion is caused by a gradient of spin densities for upspins and down-spins, and the spin drift is induced by an electric field in the semiconductor channel. As a result, spin transport length is modulated by electric field as expressed in Eq. 1. In the spin XOR measurements, spin transport from FM-A to FM-B corresponds to the downstream spin transport, resulting in increment of spin transport length. In contrast, the spin transport from FM-B to FM-A corresponds to the upstream spin transport. When the spin absorption effect by FM-A are enhanced by reduction in R int. A , number of the spins in the Si channel reabsorbed by FM-A is increased. In this situation, further electric field is needed to enhance number of the spins transported from FM-A to FM-B. The spins generated by FM-B and transported to FM-A are also absorbed by FM-A. However, it is noted that most of the spins from FM-B cannot reaches FM-A because of the upstream spin transport. Therefore, the reduction in R int. A affects only the spins injected from FM-A, resulting in strong modulation of I 0 condition. In contrast, both spins generated from FM-A and FM-B are absorbed equally by FM-B when R int.B is decreased. In this case, shape of hysteresis feature does not change except for the magnitude, resulting in the stable I 0 condition. Actually, we recognize the reduction in spin accumulation voltage due to spin resistance mismatch of R int. B as shown in color contour plots of V ↓↓ -V ↑↑ (Fig. 3(c)) and V ↑↓ -V ↓↑ (Fig. 3(d)). Because, the behaviors of reduction in spin accumulation voltage are similar for V ↓↓ -V ↑↑ and V ↑↓ -V ↓↑ , the ratio of V ↓↓ -V ↑↑ to V ↑↓ -V ↓↑ is calculated to be the constant value irrespective of R int. B . When both R int. A and R int. B are changed (Fig. 3(f)), I 0 is changed mainly due to R int. A resulting in similar behavior with Fig. 3(a). We expect that the variations of R int. A and R int. B are not crucial issues in our device, because their effects become pronounced when the interfacial resistance-area product is smaller than 1.00×10 -9 Ωm 2 .
Finally, we discuss possible origins of large difference in I 0 between device A and B. Since the ion implantation technique and the lithography process are well established, the effects of variation in d AB and σ Si are negligibly small. We also confirmed that values of R int. A and R int. B in device B are almost the same as those in device A. Therefore, a possible origin is variation in spin polarization. Actually, voltage difference between V ↑↓ -V ↓↑ for device B (6.4 μV) is much smaller than that for device A (34 μV) at I = 0.5 mA. Because a new device geometry with three ferromagnetic electrodes was employed in this study, fabrication procedures is not optimized, which might cause variation in spin polarization.
In conclusion, we theoretically investigated stability of spin XOR gate operation with variations of the device parameters such as spin polarization, conductivity of the nonmagnetic channel, electrode distance between FM-A and FM-B, and interface resistance. Although all parameters except for the R int.B strongly modulate the spin XOR gate condition, we found the optimum condition for stable spin XOR gate operation. For example, large d AB , P B, and R int.A are desired. In contrast, σ Si affects all region and a precise control of σ Si is desired. Our findings could be useful to optimize the devise design with a robustness against variations of spin transport parameters.
This work was supported by JSPS (KAKENHI No. 16H06330 and No. 19H02197).