mm3-sized optical neural stimulator based on CMOS integrated photovoltaic power receiver

In this work, we present a simple complementary metal-oxide semiconductor (CMOS)-controlled photovoltaic power-transfer platform that is suitable for very small (less than or equal to 1–2 mm) electronic devices such as implantable health-care devices or distributed nodes for the Internet of Things. We designed a 1.25 mm × 1.25 mm CMOS power receiver chip that contains integrated photovoltaic cells. We characterized the CMOS-integrated power receiver and successfully demonstrated blue light-emitting diode (LED) operation powered by infrared light. Then, we integrated the CMOS chip and a few off-chip components into a 1-mm3 implantable optogenetic stimulator, and demonstrated the operation of the device.

A large number of wireless powering and energy-harvesting technologies have been proposed and demonstrated by different research groups. Some of these techniques, such as RFID or Qi, have been successfully commercialized. However, to our knowledge, there is no de facto standard for wireless powering technologies for devices with dimensions less than or equal to 1-2 mm.
The need for battery-less microelectronic devices with very small dimensions has increased with advancements in the design of implantable healthcare devices or in distributed intelligent nodes for Internet of Things (IoT) systems. Some groups have discussed small implantable devices that are powered by electromagnetic wireless power transfer. [1][2][3][4][5] However, there is an inevitable tradeoff to be considered between the antenna size and available power. When the size of the receiver coil is reduced, both the voltage and current decrease as well. This is a major constraint in electromagnetic power transfer.
In order to develop a wirelessly powered microelectronic platform having dimensions of less than 1 mm, we propose the use of a CMOS-controlled photovoltaic (PV) power-transfer mechanism. 4,6-10 For biomedical devices, red or infrared (IR) light can be used to power the implanted electronics because this type of light can penetrate human tissue. For IoT devices, we expect to develop intelligent IoT nodes using indoor ambient light. Unlike in electromagnetic energy transfer, the voltage of PV cells does not depend on the size of the device. Only the photocurrent decreases as the area of the PV cell is reduced, and this reduction is proportional. Taking advantage of this inherent characteristic of PV cells, we developed a CMOS-controlled power receiver applicable for biomedical or IoT devices. We demonstrated a battery-less, optical ID transmission device with a diameter of 12 mm that includes off-chip PV cells. 10 In this work, we integrated PV cells onto a CMOS chip. [11][12][13][14] This allowed us to reduce the size of the power receiver platform. With the help of a low-current self-powered CMOS voltagedetection circuit, we succeeded in powering an InGaN blue LED. We aim to apply the LED to optical (optogenetic) neural stimulation. Finally, we integrated the CMOS chip and the off-chip components into an implantable optical stimulator, whose volume was as small as 1 mm 3 . Figure 1 shows (a) the block diagram and (b) the schematic of the proposed CMOS-controlled PV power receiver. 10 As the power receiver, we used series-connected PV cells along with a bias generator. Using this strategy, we were able to mitigate the requirement for a voltage booster circuit. 7,8,15,16 We were able to simplify the circuit design and the matching between operational conditions of the power receiver and the load circuit. As a drawback of the circuit simplicity, this approach is potentially disadvantageous from the viewpoint of power efficiency because it requires multiple photons to generate an electron at a multiplied voltage. The CMOS circuit simply monitors the voltage of the capacitor, V CAP , which is charged by the power-receiving PV cells, and it turns on and off the CMOS switch to the load circuit (an LED in this study). 17 The circuit shown in Fig. 1(b) is based on the self-powered Schmitt trigger presented in Ref. 18. However, owing to the transition current of the CMOS inverters in the circuit, the circuit is not compatible with the low currents (typically less than 1 µA) provided by the integrated PV cells. To enable the circuit to adapt to the small PV current, we modified it in order to limit the transition current with n-channel MOS (NMOS) transistors, which are indicated as M n4 , M n5 , and M n7 in Fig. 1 Turn-on and turn-off voltages (V on and V off , respectively) can be determined by choosing the appropriate bias voltages. Four bias inputs (V bn1 , V bn2 , V bp1 , and V bp2 ) were taken from intermediate nodes of the series-connected PV cells for biasing. Therefore, the bias voltages are denoted by the intermediate node number of the series-connected PV cells at which the voltages are taken, as shown in Fig. 1(b). When the device is illuminated, the bias voltages rapidly reach steady values, and this is different from the case with the powering capacitor, V CAP . Considering the chosen bias conditions, we expected V on = 3.5 V and V off = 2.5 V as typical values. However, V on and V off depend on the illumination because the bias voltages from the second series of PV cells depend on the illumination. The experimentally obtained V on and V off will be resented later in Fig. 5(b).
In this work, we integrated two sets of series PV cells (for powering and biasing) onto a CMOS chip. Figure 2 shows (a) the layout of the CMOS chip and (b) the post processing performed to separate the integrated PV cells. The chip was fabricated using 0.35-µm, 2-poly, 4-metal standard CMOS technology. We used an n-well/p-sub diode structure as the integrated PV cell. Ten series PV cells with size 270 µm × 270 µm were integrated for powering, and seven series PV cells of size 120 µm × 170 µm were integrated for biasing, as shown in Fig. 2(a).
Although we designed multiple PV cells on the CMOS chip, as fabricated, they did not work as power receivers or as bias generators. All of the p-layers of the PV cells were shorted at the substrate, thereby requiring us to separate the PV cells, as shown in Fig. 2(b). 19 Figure 3 shows a schematic of the PV cell-separation process. The chip separation was performed using the Bosch etching process (Deep RIE). Prior to the Bosch process, a patterned mask layer was formed by photolithography. A film resist (Photec RY-3315EE, Hitachi-Kasei) was used as the etching mask layer. The Bosch process was performed using MUC-21 (SPP technologies) with SF 6 and C 4 F 8  as process gases, which are widely used for Si. The conditions for the process are: 180 cycles of etching for 12 s with SF 6 and 8-s-long passivation with C 4 F 8 .
The etching process separates the Si substrate structure that works as the p-layer of the PV cells; the cells are physically and electrically connected by the metal wiring layers in the remaining upper structure of the CMOS chip. The total thickness of the remaining upper structures is typically less than 10 µm, and the structure is quite fragile. Therefore, after the separation process, in order to prevent breakage of the chip, the chip was molded with an epoxy resin from the backside before detachment from the glass substrate.
It should be noted that some previous reports suggested the idea of using a p + -diff/n-well/p-sub structure for an integrated PV cell. 20,21 Because we had a pn junction (p + -diff/n-well diode) isolated from the substrate by a reverse-biased pn junction (n-well/p-sub), we expected stacked p + -diff/n-well PV cells to generate an increased PV voltage without any post processing. However, the photocurrent generated between the n-well and (grounded) p-sub reduces the voltage and current generated by the stacked p + -diff/n-well PV cells, especially at longer wavelengths. 21 Therefore, we opted to physically separate the integrated PV cells using post processing.  We optimized the separation process and successfully obtained a voltage of 400-450 mV for each PV cell. Not only did we confirm the expected functionality of the series PV cells, we also discovered that we could obtain PV energy from backside illumination. This finding provides additional options for device integration. The external quantum efficiencies of the integrated PV cells were approximately 44% for topside illumination and 2.3% for backside illumination for a chip thickness of 150 µm. The chip was illuminated by an IR LED light source with a peak wavelength of 860 nm.
We tested the CMOS-controlled charge and operation cycles using bench-top measurements. Figure 4 shows the experimental setup for the bench-top characterization with a resistive load (for Figs. 5 and 6) and an InGaN blue LED load (Fig. 7). As seen in Fig. 4, the CMOS integrated PV  power receiver chip was mounted on a universal printed circuit board (PCB). The CMOS chip was mounted on a glass placed over the hole on the PCB to perform backside illumination. V CAP , GND, and V OUT pads on the CMOS chip were connected to printed patterns on the PCB. The external capacitor and the load device (a 5-kΩ resistance or a blue LED) were connected outside the PCB. The CMOS chip was illuminated by an array of 5 × 5 IR LEDs (Osram SFH4550) operated with 47 mA. The peak wavelength of the IR LED was 860 nm. The illumination intensity was varied by changing the distance between the IR LED array and the CMOS chip. The illumination intensity at the CMOS chip was calibrated using a conventional optical power meter (Thorlabs S112C). Blue LED emission intensity traces shown in Fig. 7 were measured with a Si photodiode sensor (0.8 × 0.9 mm 2 , Optotechno Co. LTD., custom-made) placed close to the blue LED. The sensitivity  of the photodiode sensor was experimentally calibrated using a continuously operated blue LED and the above-mentioned optical power meter (Thorlabs S112C).
To demonstrate the 1-mm 3 -large device [ Fig. 8 (Multimedia view)], we mounted it on a slide glass and illuminated the backside of the CMOS chip using a commercially available IR flashlight. The emission peak wavelength of the IR flashlight was 850 nm and the illumination intensity was approximately 0.6 mW/mm 2 . Figure 5(a) shows V CAP and V OUT traces obtained during the IR-driven operation in the setup shown in Fig. 4. A 5-kΩ resistance was used as the load. The capacitance was 1.0 µF and the illumination was 0.43 mW/mm 2 . The chip was illuminated from the top side. The CMOS integrated PV power receiver successfully generated pulses of power. Under this operating condition, V on = 3.92 V and V off = 3.04 V were obtained. Figure 5(b) shows the turn-on voltage V on and turn-off voltage V off as functions of the IR illumination on the integrated PV power receiver chip. As shown in Fig. 5(b), V on and V off are almost independent of IR illumination within each operating mode, i.e., top-illumination and backside-illumination. The values of V on and V off show a very small increase according to the IR illumination in each of the operating modes. However, between the threshold voltages for top-illumination and backside-illumination operations, the difference is as large as 1 V. As previously mentioned, the quantum efficiency of the integrated PV cell in the backside-illumination operation is less than 1/10 of that for the top-illumination operation. The mismatch of the V on and V off between the top-illuminated and backside-illuminated operations is attributed to lower open-circuit voltages, which are due to the lower photocarrier generation in the backside-illumination operation. They give lower bias voltages shown in Fig. 1(b), which lead to lower V on and V off . Figure 6 shows the operating frequency of the CMOS integrated PV power receiver as a function of the illumination and the capacitance. The operation frequency was roughly proportional to the illumination intensity, and was inversely proportional to the capacitance. This result is consistent with the linear relationship between the photocurrent and illumination, as well as with the relationship between the charging time and capacitance.
One of the primary target applications of the proposed integrated PV power receiver is implantable electronic devices, especially implantable optical neural stimulators, 2-5 which can provide local light stimulation to the brain or any other neural system. To confirm the functionality of the proposed device as an implantable optical stimulator, we replaced the 5-kΩ load with an InGaN LED chip. The LED chip is a commercially available bare chip of size 280 µm × 355 µm, and has a peak emission wavelength of 470 nm. It typically produces an output power of 1.4 mW (∼13 mW/mm 2 ) at 5 mA. Figure 7 shows the experimentally obtained emission intensity traces in (a) top-illumination and (b) backside-illumination operation modes. The emission traces were measured for different capacitances, ranging from 1.0 to 10 µF. In both operation modes, peak emission intensities greater than 10 mW/mm 2 were successfully obtained. This covers the stimulation intensity range required for ChR2, which is a commonly used protein in optogenetics. 22 The typical stimulation intensity for well-expressed ChR2 is suggested to be 1-10 mW/mm 2 or even smaller.
We obtained a longer pulse duration for larger capacitances. In the top-illumination operation, the turn-off voltage V off is approximately 3 V, at which time the LED emits light. Therefore, the ends of the light pulses in Fig. 7(a) are defined by the turn-off of the power supply from the capacitor to the blue LED. On the other hand, in the backside-illumination operation (Fig. 7(b)), V off is approximately 2.4 V, at which time the LED does not emit light. This makes the ends of the emission pulses in Fig. 7(b) gradually decrease to zero. The power supply to the LED was turned off after the end of the blue light emission observed in Fig. 7(b). This difference causes a longer pulse duration under backside-illumination conditions.
In either operation mode, the pulse duration is as short as 0.2-4 ms, and this spans only a part of the required stimulation duration in optogenetic applications. In many cases, pulse durations within the range of 1-20 ms are selected for wireless optogenetic stimulation. 3,[23][24][25] For the current design, we did not integrate a current-conditioning circuit for the LED. Therefore, the emission intensity of the LED exhibited a temporal dependence owing to the voltage change during the operation. The circuit drives the LED at a maximum available voltage, and it causes the capacitor to rapidly discharge, after which it has a shorter pulse duration. To control the stimulation intensity and maximize the pulse duration, it is important to control the LED drive current. In future studies, we will introduce a currentlimiting MOS transistor to regulate the illumination intensity. We expect to achieve a stimulation intensity of 10 mW/mm 2 with a pulse duration of 10 ms by implementing a current regulator in the CMOS chip, and by subsequently selecting an appropriate capacitor to provide the required pulse duration.
As shown in Figs. 5-7, the present CMOS integrated PV power receiver can be operated with an IR intensity range less than 1 mW/mm 2 . Generally, IR illumination causes heat generation and other biological effects. The effect of IR illumination on tissues has been an area of interest as a method of phototherapy for a long time because it is expected to have various positive effects in living bodies, such as enhanced recovery from injuries or strokes in the brain. [23][24][25][26] Based on studies in the area of phototherapy, the illumination intensity of 1 mW/mm 2 is within the intensity range of low-level laser (or LED) therapy (LLLT). 23,24 Further, from simulations 25 and experiments, 26 it is found that the temperature elevation due to this level of IR illumination (1 mW/cm 2 ) is less than 1 • C, or may even be negligible. This means that the application of IR illumination to drive the present CMOS integrated power receiver will not cause any serious damage to target tissues such as the brain. In addition, even if any positive biological response is available as a therapeutic scheme, it will be a long-term response, 23,24 and will not have an effect in most optogenetic applications.
After the bench-top functional characterization, we integrated the CMOS chip with an external capacitor, and the InGaN LED chip into an implantable optical neural stimulator. Figure 8 (Multimedia view) shows the structure and the photograph of the device. We took advantage of the voltage generation from backside illumination to develop the compact structure shown at the topleft of Fig. 8 (Multimedia view). A 2.2-µF capacitor was integrated for this specific device. As shown in Fig. 3, we made wafer-penetrating trenches to separate the integrated PV cells on the CMOS chip, and we filled the trenches with epoxy resin. Therefore, the CMOS chip may be handled using conventional tweezers. We mounted the CMOS chip on a glass slide using poly(vinyl alcohol) (PVA) for the packaging process. The capacitor and the InGaN blue LED were integrated by hand on the CMOS chip using epoxy or UV-cure acryl resin. Typical dimensions of the capacitor are 1.0 mm × 0.5 mm × 0.33∼0.5 mm. As mentioned previously, the size of the InGaN LED is 280 µm × 355 µm, and the thickness is approximately 90 µm. After the resin was cured, Al wires were bonded between the components (two wires between the CMOS chip and the capacitor, and two wires between the CMOS chip and the LED). A conventional manual wedge-wire bonder was used for the bonding process. Finally, the top side of the device, including the CMOS chip surface and all off-chip components were molded with epoxy or UV-cure acryl resin.
The total thickness of the stacked devices is approximately 0.6 mm (with a 0.33-mm-thick capacitor), and the estimated volume of the device is less than 1 mm 3 , including the epoxy and acryl resin for molding. To the best of our knowledge, this device is the world's smallest wireless optical neural stimulator powered using an electric circuit. The device can be operated by IR light sources (such as the IR handy flashlight at the top-right side of Fig. 6), as is expected from the characteristics shown in Figs. 5-7. Table I shows specifications of the present CMOS-integrated PV power receiver chip and the implantable optogenetic neural stimulator. Table II shows a comparison with other wireless optogenetic stimulators in previous works. 3,4,[27][28][29][30][31][32] The greatest advantages of the present device are its small dimensions and light weight. Both the volume and weight are almost one order of magnitude smaller than any of the preceding works. This size is realized by the PV power transfer and intermittent operation scheme adopted in this work. Electromagnetic power transfer is a limiting factor in the integration of the power receiving coil. The minimum diameter of the coils for the devices in Table II is 1.6 mm, 3 which is larger than any dimension of the device realized in this work. However, as a drawback, the present device can be applied only for pulse stimulation, and requires a charge time for each stimulation. As mentioned previously, we aim to improve the circuit in order to realize optogenetic stimulation with 10 mW/mm 2 and 10 ms. Furthermore, we can increase either the stimulation intensity or pulse duration by integrating a larger capacitor.
Considering that most optogenetic stimulations are performed not with a single pulse, but with multiple pulses (pulse train), we also need to improve the power-receiving and conversion efficiency. As shown in Table I, the system-wise power-conversion efficiency from IR excitation light to blue stimulation light is 4.7% for the top-illumination operation and 0.16% for the backside-illumination operation. These values are realistic limits of the duty ratio in pulse-train stimulation (with no intensity boost from IR to blue light). In general, a duty ratio value of less than 20% is employed in optogenetic stimulations. It is reasonable to adopt the top-illumination scheme for the next-generation optogenetic stimulation device, and this will improve the systemwise power-receiving and conversion efficiency from 4.7% to over 20% by performing circuit refinements.
In this work, we developed a CMOS-based power receiver using integrated PV cells. The expected application is the field of implantable microelectronic devices and IoT micro-nodes. We obtained the expected functionality of the chip using the integrated-series PV cells, and an adequate PV voltage was generated. A self-powered voltage-monitoring circuit monitored the voltage of the capacitor and automatically switched for an intermittent LED operation. We demonstrated blue light emission from an InGaN LED powered by IR light. We integrated the components and developed a 1-mm 3 implantable optical neural stimulator. Montgomery et al. 3 Shin et al. 29 Lee et al. 30 Park et al. 4 Park et al. 31 Jia