Evidence for oxygen vacancy manipulation in La 1 / 3 Sr 2 / 3 FeO 3 − δ thin films via voltage controlled solid-state ionic gating

Reversible changes of the structural and electronic transport properties of La1/3Sr2/3FeO3-δ/Gd-doped CeO2 heterostructures arising from the manipulation of δ are presented. Thermally induced oxygen loss leads to a c-axis lattice expansion and an increase in resistivity in a La1/3Sr2/3FeO3-δ film capped with Gd-doped CeO2. In a three-terminal device where a gate bias is applied across the Gd-doped CeO2 layer to alter the La1/3Sr2/3FeO3-δ oxygen stoichiometry, the ferrite channel is shown to undergo a change in resistance of an order of magnitude using gate voltages of less than 1 V applied at 500 K. The changes in resistance remain upon cooling to room temperature, in the absence of a gate bias, suggesting solid state ionic gating of perovskite oxides as a promising platform for applications in non-volatile, multistate devices. © 2017 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). [http://dx.doi.org/10.1063/1.4982249]

electric double layer transistors using a Gd-doped CeO 2 gating layer have been explored, demonstrating that the source-drain current across a SrTiO 3 (STO) channel can be increased by up to four orders of magnitude with gate voltages above 2 V. 21 The mechanism behind this phenomenon was attributed to the accumulation of oxygen anions at the Gd-doped CeO 2 /STO interface, which modifies the conductivity in the STO at the interface.These three-terminal devices represent a novel platform for controlling various functional properties via the electrostatic modulation of oxygen anions and vacancies and motivate our study exploring the use of a gate bias applied across a solid-state electrolyte to manipulate the oxygen concentration in the adjacent ferrite perovskite channel.
3][24] The parent compound LaFeO 3 is an insulator with a 3d 5 configuration on the B-site.The heterovalent substitution of Sr 2+ on the La 3+ site effectively dopes the Fe 3+ (d 5 ) sites to a nominal d 5 L configuration, where L denotes a hole on the oxygen 2p band. 25The effect of hole doping splits the stable e g majority spin band, leading to orders of magnitude increases in electronic conductivity at higher concentrations of Sr 2+ . 24A similar effect on conductivity is seen from the formation of oxygen vacancies, which acts to remove holes from the material, thereby driving the nominal Fe valence back to 3+.In the case of La 1/3 Sr 2/3 FeO 3-δ , a δ value of 0.35 yields a nominal Fe 3+ configuration, leading to low conductivity similar to LaFeO 3 .2][33][34] In reducing and oxidizing environments, oxygen vacancy formation and migration within the lattice couples to both electronic and ionic conductivity enhancement, though the concentration of electrons is thought to be small and dominated by oxygen ions.Ionic defect formation can be expressed in the Kroger-Vink notation via the following reactions: 35,36 30 nm thick La 1/3 Sr 2/3 FeO 3-δ (LSFO) films were first grown using oxygen assisted molecular beam epitaxy (MBE) on single crystal (001) STO and (LaAlO 3 ) 0.3 (Sr 2 TaAlO 6 ) 0.7 (LSAT) substrates (MTI Corp.). 37Bulk LSFO (δ = 0) is rhombohedral with the a -a -a -rotation pattern and a pseudocubic lattice parameter of 3.872 Å. 38 For the sake of simplification, the film is described as pseudocubic in this work, but the actual structure under tensile strain is likely to be a -a -c -or a -a -c 0 . 39La, Fe, and Sr were co-deposited, while the substrate was kept at 600 ± 25 • C under an oxygen background pressure of 2 × 10 6 Torr.After growth, the films underwent a two-step annealing process to minimize oxygen vacancies.The first step is a high temperature anneal in O 2 atmosphere at 675 • C for 3 h, followed by an hour at 200 • C in a flowing O 3 /O 2 mixture (∼5/95%) to minimize oxygen vacancies.Epitaxial Gd 0.2 Ce 0.8 O 2 (GDC) films of 400-nm thickness were deposited at the Center for Nanophase Materials Science at Oak Ridge National Laboratory using pulsed laser deposition at 600 • C under a background pressure of 50 mTorr O 2 and a laser fluence of 1.5 J/cm 2 .The bilayer sample was annealed a second time with the same conditions listed above prior to measurements.
We begin by describing oxygen loss behavior in a LSFO/GDC bilayer on a STO substrate.Before three-terminal devices are discussed, it is important to confirm that the LSFO films can be oxidized and reduced at low temperatures (200 • C) even when capped with GDC.The effect of thermally induced oxygen loss in both LSFO and GDC, as probed by the structural and electronic characterization, is presented in Figure 1.The bilayer was heated to 200 • C in atmosphere on a hot plate.Fig. 1(a) shows high resolution X-ray diffraction (XRD) 2θ-ω scans, measured about the LSFO and STO (002) diffraction peaks at different points in the heating cycle.The diffraction data were measured at room temperature after the samples were heated at the same temperature (200 • C) for different time increments and analyzed using simulations carried out with the GenX software package (see Fig. S1 in supplementary material).We measured the fully oxidized LSFO pseudocubic lattice parameter to be 3.860 Å; assuming the film is strained this corresponds to a sample volume of 58.9 Å 3 , in close agreement with reported bulk values. 40,41The LSFO layer was found to have a 0.5% thermally induced expansion of the out-of-plane lattice constant from 3.860 Å to 3.878 Å after 10 h of heating, as shown in Fig. 1(b).The structural change in the LSFO channel is attributed to oxygen vacancy formation within LSFO, consistent with previous works that demonstrated oxygen loss leads to a lattice expansion in LSFO. 42,43Comparing these results to previous experiments of uncapped LSFO films, 44 the changes in the LSFO lattice parameter are smaller and take longer than a single layer of an uncapped LSFO film of similar thickness heated to 200 • C.This difference is thought to arise from the GDC forming a barrier layer that partially inhibits the reduction of LSFO.Without the presence of the GDC layer, the oxygen ions are more readily desorbed from the surface. 45Upon annealing in dilute ozone, the LSFO lattice parameter was decreased back to the initial value of 3.860 Å, and the cycle could be repeated.
The GDC (002) diffraction peak was measured and the c-axis parameter was calculated to be 5.434 Å, shown in Fig. 1(b).Upon heating, no discernable change was measured, suggesting that the oxygen vacancy concentration within the GDC lattice does not change significantly when heated to 200 • C alone (Fig. S2, supplementary material).
Further verification of the change in oxygen vacancy concentration was made by measuring the resistivity of the LSFO layer, shown in Fig. 1(c).All measurements were completed along the same sample orientation at room temperature using the van der Pauw method.The sample initially began with a resistivity of ∼4 mΩ-cm, which is a factor of 4 times higher than what has been reported for nominally oxidized LSFO. 38This is attributed to slight deviations in stoichiometry, as both excess La 3+ and oxygen deficiency (δ 0) can shift the nominal Fe valence towards 3+ with a corresponding increase in room temperature resistivity.The LSFO resistivity increased by more than an order of magnitude over the duration of heating, and the original resistivity could be restored upon ozone annealing and the cycle could be repeated.Similar to the behavior of the out-of-plane lattice parameter, the increase in resistivity for similar conditions is smaller than single layer LSFO films. 44Similar resistivity measurements were attempted on the top GDC layer, though the resistance was greater than the sensitivity of the Keithley multimeter (∼10 9 Ω).These experiments indicate that GDC can act as a source/sink for oxygen vacancies in adjacent LSFO and that oxygen vacancies can move across the interface between layers.
To further investigate the behavior of interfacial oxygen vacancy exchange between LSFO and GDC, we fabricated three-terminal devices from a bilayer grown on LSAT.A schematic of the threeterminal device is shown in Fig. 2(a).LSFO films were first deposited on (001) LSAT, followed by a two-step anneal.The oxidized films were fabricated into 200 µm × 100 µm channels by optical lithography and argon ion milling.Bottom electrodes were deposited using electron beam evaporation (15 nm Ti/100 nm Au), followed by another two-step anneal to re-oxidize the LSFO layer.Similar to the bilayer samples, a 400 nm thick GDC film was next deposited using pulsed laser deposition.A top gate was then deposited via e-beam evaporation with similar conditions to the bottom electrodes, followed by another anneal.For source-drain measurements, the GDC was scratched off, away from the device structure, and silver paint was used for contacting electrodes.Temperature-dependent electrical measurements were made to analyze the source-drain resistance of LSFO/GDC in the device geometry.Low temperature resistance measurements (<300 K) were completed using a Physical Properties Measurement System in conjunction with external Keithley electronics for sourcing current (model 6220) and measuring voltage (model 2182A).High temperature measurements were made using the same electronics on a hot plate.
Figures 2(b) and 2(c) illustrate the two proposed operating modes of the three-terminal device.Applying a negative bias of sufficient magnitude to the top gate terminal attracts positively charged oxygen vacancies and results in O 2 ions moving towards the LSFO/GDC interface and into the LSFO channel by diffusion.As O 2 ions enter the LSFO layer, there is a corresponding decrease in resistance.Conversely, a positive bias attracts O 2 ions, forming vacancies within the conducting channel causing the channel resistance to increase.Because ionic conductivity is an activated process, increasing exponentially with temperature, the effect of bias manipulation is expected to be heavily dependent on the temperature and magnitude of the applied bias.
Figure 3(a) shows the temperature dependent resistance for the unpatterned film before GDC deposition and the channel of the three-terminal device.The room temperature resistance for the starting film was ∼8 kΩ (3 mΩ-cm resistivity).Upon cooling, the resistance increases with an inflection point observed near 175 K due to an electronic phase transition that localizes the electrons along the Fe [111] direction. 22The three-terminal device maintains a similar resistive character with an order of magnitude increase likely due to the reduced sample volume in the patterned structure and the presence of contact resistance from the two-point measurements of the device compared to four-point measurements from the film.To illustrate the effect of electrostatic gating, the sample was first reduced to a high resistance state of 10 MΩ by heating to 550 K for several minutes to increase oxygen vacancy concentration by thermal means (not shown).The thermal increase in resistance was found to occur at temperatures of 485 K and greater in the three-terminal device, with a more rapid increase in resistance (40 kΩ in 3 min) at 500 K as compared to the bilayer devices, suggesting that the three-terminal device is more susceptible to oxygen loss.This thermally induced oxygen loss could be suppressed by applying a 0.125 V (50 kV/cm) gate voltage, which was found to stabilize the resistance and corresponding oxygen vacancy concentration.
Figure 3(b) shows the resistance sweep starting from a high resistance state and ending in a low resistance state.The device was heated to 500 K, where a 0.5 V gate voltage was applied for 30 min.After 30 min, the sample was cooled with a 0.125 V gate bias to reduce the effect of thermally induced oxygen loss.The sample was found to have nearly a two order of magnitude decrease in room temperature resistance from 10 MΩ to 200 kΩ.The majority of this effect occurs within the first 7 min of the applied voltage, as seen in Fig. 3(c).At 500 K, the sample showed only a six-fold decrease in resistance, indicating that the change at high temperature is not directly proportional to the change at room temperature.At 300 K, the gate voltage was removed and the resistive state remained stable for several days.We next demonstrate that the voltage-induced change in channel resistance is reversible and allows for multistate, non-volatile channel resistances.As shown in Figure 4(a), the non-volatile behavior of the device was demonstrated by heating to 500 K, at which point a 0.5 V gate voltage was applied causing the channel resistance to decrease.After 5 min, the gate voltage was then lowered to 0.125 V and the sample was cooled to room temperature.At room temperature, the gate voltage was removed and the sample was heated back to 500 K where a +0.5 V gate voltage was applied until the resistance had increased back to the original starting point of 10 5 Ω.After reaching this resistance, the gate voltage was again set to 0.125 V and the sample was cooled following the original temperature dependent resistance.These results confirm that the gate bias can be used to increase or reduce the LSFO resistance in a non-volatile manner, which we attribute to the oxidation and reduction of the channel layer.
Further illustration of the device behavior was obtained by applying gate voltages of increasing magnitude for equal time periods at 500 K, as shown in Fig. 4(b).The initial constant channel resistance was realized with a stabilizing bias (0.125 V).The first gating cycle was started around 300 s.The gating periods with negative biases were approximately 5 min in length, beginning from 0.5 V to an upper limit of 0.875 V in increments of 0.125 V.After the application of each negative gate bias, the polarity of the bias voltage was reversed to +0.5 V until the channel resistance was restored to the starting resistance state.The data indicate a 45% decrease in resistance for the 0. bias and a 66% decrease for the 0.875 V bias after 5 min.At gate biases larger than 0.875 V, signal noise dominated and reliable data could not be collected.
We next demonstrate how a variety of channel resistance values can be obtained at both 500 and 300 K by changing the gate bias.Fig. 4(c) shows the results for "programming" the room temperature resistance by applying the bias voltages at 500 K and cooling to room temperature under a 0.125 V stabilizing bias.The results demonstrate how the channel resistance at room temperature can be modified from the original value in a variety of ways.Varying the voltage magnitude at high temperature for equal time periods will cause a decrease in resistance that is proportional to the applied bias.Likewise, similar resistance drops were obtained by applying a singular voltage value for differing time periods.The first three cycles show the sample undergoing 5-min gating periods from 0.25 V, 0.5 V, and 0.75 V.The room temperature resistance was decreased incrementally by roughly 74% over this time period.A +0.5 V bias was applied for 8 min to restore the resistance at 500 K to 10 5 Ω.To lower the resistance back to a similar 74% decrease, 0.5 V was applied for 7.5 min and cooled back to room temperature.These results indicate that reversible, non-volatile multistate behavior can be achieved in the LSFO channels via an ionic gate bias.
The obtained results provide clear evidence for three-terminal solid-state ionic gating.However, the channel resistance measurements do not directly probe oxygen concentration, and as such, future efforts are needed to provide more direct measurements of oxygen content within the channel to better understand the device operation mechanism.Hard X-ray microdiffraction or soft X-ray absorption spectroscopy could provide more direct insight into the oxidation state of the underlying LSFO channel layer.It should also be noted that reproducibility is a significant challenge with these devices and multiple devices did not yield the presented behavior but instead were too resistive to measure after device processing.We believe this is due to excessive oxygen loss during the various fabrication steps.High temperature and/or ozone annealing carried out on the devices was not found to resolve the issue.In structures with the device geometry shown in Figure 2, if the channel material is too resistive due to excessive oxygen loss, then the gate bias is not effective in oxidizing the channel as the voltage is dropped across the LSFO channel and not the GDC layer.We anticipate that grounding the gate bias to a conducting substrate, as opposed to the LSFO layer through the drain electrode, may resolve this issue.While future efforts are needed to optimize processing in order to improve device reliability and to reduce the temperature needed during the application of the gate bias, the use of all-oxide three-terminal structures with solid state electrolytes is promising for multistate and non-volatile electronic devices.
See supplementary material for comparisons of measured and simulated diffraction data, GDC diffraction data, and a comparison of resistance changes in the three-terminal device obtained from the two-step anneal and a negative gate bias.This work was supported by the National Science Foundation under Grant No. DMR-1151649.

FIG. 1 .
FIG. 1. Evolution of the LSFO/GDC bilayer properties as a function of heating.(a) 2θ-ω scans of the LSFO (002) peak measured at room temperature over several heating steps at 200 • C. The peak at 46.5 • is the SrTiO 3 (002) reflection.(b) c-axis parameter for LSFO and GDC films as a function of heating time.(c) Room temperature resistivity of the LSFO layer as a function of heating time.

FIG. 2 .
FIG. 2. (a) Schematic of the three-terminal LSFO/GDC device structure and a corresponding optical micrograph of fabricated devices.In (b) and (c), the working principle for three-terminal devices is presented, illustrating oxygen ion migration into and out of the LSFO conducting channel as a result of the applied gate bias.

FIG. 3 .
FIG. 3. (a) Temperature dependent resistance comparison for an unpatterned LSFO film and the channel of the LSFO/GDC three-terminal device.(b) Temperature dependent oxidizing cycle for the device exposed to a 0.5 V gate bias at 500 K and cooled to 300 K with a stabilizing 0.125 V gate bias and (c) the corresponding decrease in resistance as a function of time under the gate bias (V g = 0.5 V) while the temperature is held constant at 500 K.

5 VFIG. 4 .
FIG. 4. Temperature dependent gating effects on the three-terminal device.(a) Non-volatile behavior obtained by heating and cooling the device after biasing at ±0.5 V with a stabilizing cooling bias (0.125 V).(b) The effect of different gate biases on the channel resistance as a function of time at 500 K. (c) Evolution of the resistance at 300 K and 500 K after different gate biases, illustrating stable multistate channel behavior at room temperature.