Circuit Quantum Electrodynamics Architecture for Gate-Defined Quantum Dots in Silicon

We demonstrate a hybrid device architecture where the charge states in a double quantum dot (DQD) formed in a Si/SiGe heterostructure are read out using an on-chip superconducting microwave cavity. A quality factor Q = 5,400 is achieved by selectively etching away regions of the quantum well and by reducing photon losses through low-pass filtering of the gate bias lines. Homodyne measurements of the cavity transmission reveal DQD charge stability diagrams and a charge-cavity coupling rate g_c/2pi = 23 MHz. These measurements indicate that electrons trapped in a Si DQD can be effectively coupled to microwave photons, potentially enabling coherent electron-photon interactions in silicon.

We demonstrate a hybrid device architecture where the charge states in a double quantum dot (DQD) formed in a Si/SiGe heterostructure are read out using an on-chip superconducting microwave cavity. A quality factor Q = 5,400 is achieved by selectively etching away regions of the quantum well and by reducing photon losses through low-pass filtering of the gate bias lines. Homodyne measurements of the cavity transmission reveal DQD charge stability diagrams and a charge-cavity coupling rate g c /2π = 23 MHz. These measurements indicate that electrons trapped in a Si DQD can be effectively coupled to microwave photons, potentially enabling coherent electron-photon interactions in silicon. Silicon is an emerging material system for spin-based quantum computing due to record long quantum coherence times. 1,2 Spin states of electrons in semiconductor quantum dots (QDs), long recognized to be highly promising candidates for the storage of quantum information, 3 have limited coherence times in traditional host materials such as GaAs due to fluctuations of the nuclear spin bath. 4,5 In silicon, owing to the zero nuclear spin carried by the naturally abundant isotope 28 Si, hyperfine induced dephasing of electron spins is strongly reduced. 6 In contrast with III/V semiconductor compounds, silicon has weak spin-orbit coupling and can be isotopically enriched to the level of 800 ppm 29 Si for further enhancement of spin coherence times. 7 Quantum devices based on Si can potentially be scaled to larger system sizes using well-developed semiconductor fabrication processes. Recent advances include the demonstration of two-qubit logic gates 8 and the fabrication of a one-dimensional chain of nine QDs that was measured using three proximal charge detectors. 9 Moreover, the long coherence times that have been reported in Si pave the way for long range coupling of spin states using superconducting cavities in the circuit quantum electrodynamics (cQED) architecture. 10,11 The field of cQED experimentally realizes on-chip interactions between a two-level system (the qubit) and photons confined within a superconducting microwave cavity. 12 Such cavities typically have frequencies between 1 and 10 GHz, which match the transition frequencies of many nanofabricated quantum devices and are therefore suitable mediators of non-local qubit interactions, providing a means for long range scaling of solid state qubits. In cQED systems with superconducting qubits, cavity photons are also widely used for dispersive state readout, as the significant electric dipole moments of these devices result in large phase shifts in the cavity response. 13,14 In semiconductor systems, hybrid cQED devices have been implemented using GaAs, 15,16 InAs, 17 carbon nanotube, 18 and graphene QDs. 19 There are several proposals pertaining to the coupling of Si spin qubits to cavities, 20,21 as well as the demonstration of a high kinetic inductance cavity, fabricated with the intention of coupling to Si quantum dots. 22 In this Letter, we present a hybrid cQED device archi-arXiv:1610.05571v2 [cond-mat.mes-hall] 9 Feb 2017 tecture that couples a silicon DQD to a superconducting cavity. The device has three key components: a halfwavelength co-planar waveguide (CPW) cavity, two gatedefined DQDs, and low-pass LC filters that serve to reduce microwave losses through the dc bias lines that are used to tune DQD. This paper is organized as follows. We describe the device layout and fabrication process, the LC filter design considerations, and then demonstrate readout of DQD charge states using the cavity. The devices are fabricated on Si/SiGe heterostructures grown by chemical vapor deposition. 23,24 A 3 µm thick linearly graded Si 1−x Ge x relaxed buffer substrate is grown on top of a Si wafer (resistivity > 5000 Ω-cm). The buffer is chemically and mechanically polished before the growth of a 170 -375 nm thick Si 0.7 Ge 0.3 layer, an 8 nm thick Si quantum well (QW), a 50 -60 nm thick Si 0.7 Ge 0.3 spacer and a 2 -4 nm thick Si cap. Wafers grown under similar conditions have maximum mobilities µ = 650,000 cm 2 /Vs and can support electron densities up to n = 8 × 10 11 /cm 2 .
The cavity fabrication process is designed to achieve two major goals: protection of the Si QW from the reactive ions used to etch the Nb cavity and the reduction of internal photon losses introduced by two-level system (TLS) defects at the heterostructure interfaces. The Si QW in the area under the cavity center pin is first removed through a 70 nm deep reactive ion etch to minimize the internal photon loss. A 30 nm thick Al 2 O 3 film, which serves as an etch stop for cavity fabrication, is then grown over the entire substrate using atomic layer deposition. Next, a 50 nm thick Nb film is deposited via dc sputtering. The cavity and filter patterns, shown in Fig. 1(a), are defined with a second reactive ion etch step using a SF 6 /Ar plasma. A hydrofluoric acid etch then removes the Al 2 O 3 film in the area where the DQD is to be defined. The resulting cross-sections of the device are schematically illustrated in Fig. 1(b).
Accumulation-mode DQDs are defined using an overlapping gate architecture. 9 A scanning electron microscope image of the DQD is shown in Fig. 1(c). For the measurements presented here, electrons are only accumulated in one of the DQDs and the other DQD does not contribute to the cavity response. The first Al layer, shaded in purple, consists of two large gates G1 and G2 that selectively screen the electrostatic potentials of the upper Al layers and form a quasi-one-dimensional transport channel. The second Al layer, shaded in pink, consists of two plunger gates P1 and P2 that are used to tune the chemical potentials of the DQD, as well as source (S) and drain (D) accumulation gates. P1 is connected to the cavity center pin and capacitively couples the DQD to the time-dependent voltage V C (t) of the cavity. A dc tap is placed at the voltage node of the cavity and used to dc bias gate P1. The third Al layer, shaded light green, consists of three tunnel barrier gates. Gate B2 tunes the interdot tunnel coupling (t c ), gate B1 tunes the dot 1source reservoir coupling, while gate B3 tunes the dot 2drain reservoir coupling. The dots have average charging energies E c = 6.9 ± 0.7 meV, average orbital energies E orb = 3.0 ± 0.5 meV, and valley splittings in the range of 35-70 µeV. 9,25 In comparison with superconducting qubit cQED devices, which generally support Q > 50,000, 26 hybrid QD-cQED systems generally have Q = 1,000 -3,000. [15][16][17]19 To coherently couple QD qubits to cavity photons, higher quality factors are needed. Measurements on previously reported device designs 17 show significant microwave leakage through the dc bias lines leading to the DQD, which we attribute to the capacitive coupling between the cavity and each of the dc bias lines. The bias lines therefore become leakage pathways that inadvertently lower the Q. To minimize microwave leakage, we insert an LC filter in each dc bias line. An LC filter is also used to dc bias the cavity, in contrast to previous devices that used a spiral inductor on the dc tap and no filter along gate bias lines. 17 Figure 2(a) shows the image of a single filter, which consists of a long interdigitated capacitor with C f ≈ 1 pF and a spiral inductor with L f ≈ 13 nH. The overall dimensions of a filter are 700 µm by 200 µm.
To evaluate the attenuation of the filter, we measure its transmission |S 21 | 2 at a temperature T = 1.5 K. The data, shown in Fig. 2(b), display a clear roll-off with frequency f . Oscillations with a frequency spacing of ∼500 MHz are also seen throughout the data range. The oscillations may be due to reflections at the wire bonds connecting the filter to the circuit board, parasitic modes introduced by discontinuities in the ground plane, and parasitic capacitances/inductances that result from the relatively large size of the filter components. On average, 20 dB of attenuation is obtained around the cavity center frequency f c = 7.67 GHz [ Fig. 2(c)].
For comparison, |S 21 | 2 , as calculated using the ABCD matrix approach, is plotted in Fig. 2(b). 27 The theory predicts a filter attenuation of 24 dB at f = 7.67 GHz. With the exception of the oscillations in the data, the overall transmission through the filter is in good agreement with theory. The undesired oscillations may be suppressed by using air-bridges to better connect distinct regions of the cavity ground plane, and improved circuit board designs to minimize the impedance of the wirebonds. 28 The incorporation of LC filters into the cavity design results in a significant increase in the cavity quality factor (cQED devices of the same DQD design without LC filters have Q < 1,000). Figure 2(c) shows the normalized cavity transmission |S 21 | 2 as a function of f with the DQD configured in Coulomb blockade at T = 10 mK. The input power P in ≈ −130 dBm corresponds to an intra-cavity photon number n ≈ 3. A fit to a Lorentzian function yields Q = 5,400, corresponding to a total photon loss rate κ/2π = f c /Q = 1.4 MHz. Using the Sonnet EM simulation program, we estimate the cavity input and output coupling rates to be κ in /2π = κ out /2π = 0.4 MHz. The remaining loss rate of 0.6 MHz may be attributed to a combination of internal loss due to the dielectric layers under the cavity and remnant microwave leakage through the LC filters. The internal loss may be reduced by etching away Al 2 O 3 and Si 0.7 Ge 0.3 in the gap between the cavity center pin and the ground plane where the electric field intensity is large. Microwave leakage can be further suppressed through improved filter designs such as multi-pole LC filters and band-stop filters. 29 We next form a DQD at T = 10 mK using the overlapping Al gate architecture [ Fig. 1(c)] and demonstrate cavity-based charge sensing. The input port of the cavity is driven at a fixed frequency f = f c and power P in = −121 dBm (n ≈ 20), while the signal exiting the cavity is amplified and demodulated to yield the transmission amplitude A and phase response ∆φ. 17 We plot the normalized cavity transmission amplitude A/A 0 as a function of V P1 and V P2 in Fig. 3(a), where the normalization constant A 0 is set such that A/A 0 = 1 when the DQD is in Coulomb blockade. The DQD charge stability diagram is revealed in the cavity amplitude response, with the boundaries of charge stability islands delineated by suppressed cavity transmission amplitudes, A/A 0 < 1. Here charge transfer between the DQD and the S/D reservoirs results in dispersive shifts of the cavity center frequency, and a reduction in the amplitude of the transmitted signal. 15,30,31 Dot 1 charge transitions generally have a larger visibility in the data since plunger gate P1 is directly connected to the cavity.
A crucial parameter characterizing cQED systems is the coherent coupling rate between the qubit and the cavity, g c . A large value of g c allows for rapid transfer of quantum states between the qubit and the cavity. Strong coupling is achieved when g c exceeds both κ and the qubit decoherence rate γ. [10][11][12] We estimate g c in this device architecture by focusing on an interdot charge transition in the many-electron regime, (N 1 + 1, N 2 ) ↔ (N 1 , N 2 + 1), where N 1 /N 2 denotes the number of electrons in dot 1/dot 2. Charge dynamics in the DQD result in a strong reduction in A/A 0 at the interdot charge transition [ Fig. 3(b)]. At the interdot charge transition, the total number of electrons in the DQD is fixed and a single excess electron functions as a charge qubit with a transition frequency f a = 2 + 4t 2 c /h, where is the level detuning, and t c is the interdot tunnel coupling. 32 For this device configuration, the minimum qubit frequency f a = 2t c /h is close to the cavity frequency f c , leading to a strong dispersive shift in cavity transmission and the observed reduction in A/A 0 . At large values of , f a f c , and the charge qubit becomes decoupled from the cavity.
In Figs. 3(c) and 3(d), we plot A/A 0 and ∆φ as a function of for the (N 1 + 1, N 2 ) ↔ (N 1 , N 2 + 1) interdot charge transition. These data are fit to cavity inputoutput theory 17,18 using the measured values of f c and κ. Best fit parameters yield t c = 16.4 µeV, g c /2π = 23 MHz, and a charge qubit decoherence rate γ/2π = 40 MHz. The values of g c and γ in our hybrid cQED device compare favorably with those in other semiconductor systems. [15][16][17][18][19] The relatively small charge qubit decoherence rate merits further investigation and may be due to the on-chip microwave filters and screening provided by the overlapping Al accumulation gates. A recent pa-per by Bruhat et al. advocates for a reduction in E c to minimize sensitivity to charge noise. 33 Our results indicate that the highly desired regime of strong-coupling, g c > [κ, γ], could be achieved with only a two-fold reduction in the qubit decoherence rate.
In conclusion, we have demonstrated readout of a Si/SiGe DQD that is embedded in a superconducting cavity. A quality factor Q = 5,400 is achieved by minimizing photon losses through the use of compact, onchip LC filters. The DQD stability diagram is visible in measurements of the transmission amplitude of the cavity. Analysis of the cavity response at an interdot charge transition yields a charge-cavity coupling rate g c /2π = 23 MHz. Looking ahead, this hybrid Si/SiGe QD cQED system could be used for the spectroscopy of low-lying valley states in Si, 34