Infrared vertically-illuminated photodiode for chip alignment feedback

We report on vertically-illuminated photodiodes fabricated in the GlobalFoundries 45nm 12SOI node and on a packaging concept for optically-interconnected chips. The photodiodes are responsive at 1180 nm –a wavelength currently used in chip-to-chip communications. They have further a wide field-of-view which enables chip-to-board positional feedback in chip-board assemblies. Monolithic integration enables on-chip processing of the positional data. C 2016 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons BY) license licenses by

We report on vertically-illuminated photodiodes fabricated in the GlobalFoundries 45nm 12SOI node and on a packaging concept for optically-interconnected chips. The photodiodes are responsive at 1180 nm -a wavelength currently used in chip-to-chip communications. They have further a wide field-of-view which enables chip-to-board positional feedback in chip-board assemblies. Monolithic integration enables on-chip processing of the positional data. C  State-of-the-art electrical chips, such as the Titan GK110 graphic processing unit (GPU) of NVIDIA, require more than 40 Tbit/s I/O bandwidth based on the 1 byte per FLOP rule-of-thumb. 1,2 However, the bottleneck caused by electrical communications limits the available bandwidth of such chips to less than a tenth of their needs. For overcoming such limitations, future microprocessors and memories will likely communicate through high-bandwidth and energy-efficient optical links. [3][4][5][6] The complex network topology of such systems is ideally defined by an optical substrate, or optical circuit board (OCB), containing arrays of single-mode waveguides, waveguide crossings, waveguide splitters and couplers. Such components have been demonstrated in a variety of material systems, including silicon nitride and polymers. [7][8][9][10][11] In these concepts the light can be coupled in and out of the chip through pairs of grating couplers, Fig. 1. However, the alignment tolerances between chip and OCB are dictated by the bandwidth of the grating couplers and are generally in the sub-µm range. 12 While commercial chip bonders with the required precision are readily available, 13 they generally require a positional feedback based on optical imaging, therefore limiting this technology to chips, packaging enclosures and/or substrates which are transparent in the visible or infrared range. Furthermore, no solution has been proposed so far for enabling end-users to plug components on the board as in current electrical systems.
To overcome these limitations, previous work has relied on a pair of grating couplers directly connected together by a shunt waveguide on the chip side, Fig. 1(a), and to align the components by minimizing the total insertion loss (loop-back configuration). 14,15 This approach however does not instantaneously provide the direction in which the components need to be moved for achieving optimal coupling, requires two sacrificial external waveguides (in the OBC or in the fiber bundle) for each shunt waveguide, and differential read-out is not possible. In this scheme, moreover, the required initial alignment tolerances are dictated by the field-of-view of the grating couplers, and external power monitors need to be aligned prior to the start of the positioning process.
In this work, we demonstrate vertically-illuminated photodiodes suitable for chip-to-OCB positional feedback and propose a packaging concept for optically-interconnected chips. In this scheme, one or more grating couplers on the OCB emit a single-mode beam towards photodiode pairs located on the chip, Fig. 1(b). The differential signal on the photodiodes is read out by on-chip electrical circuits which process the positional information. The wavelength emitted from the gratings a Current address: Institute of Electromagnetic Fields (IEF), ETH Zurich, Zurich, Switzerland. luca.alloatti@ief.ee.ethz.ch used for alignment should be close to the wavelength used for the optical links so that all waveguides in the OCB can have the same cross section (to ease fabrication) and remain single mode. All the gratings (those for I/O and for alignment) emit light at the same angle from the vertical (this angle is generally non-zero for improving the coupling efficiency) such that the in-plane offset deriving from the out-of-plane distance is the same for all the grating-to-grating pairs as well as for the grating-to-photodiode pairs. Test photodiodes have been fabricated in the GlobalFoundries (former IBM) 45nm 12SOI process, without requiring the modification of the fabrication flow and without violating the original design rules, 16 a concept that we named "zero-change CMOS". 17 In this node, we have recently demonstrated a complete toolbox of photonic components, including high-speed and high-responsivity photodiodes, 18,19 high-speed modulators 20 and low-loss grating couplers 21 monolithically integrated next to million-transistors circuits. Earlier waveguide versions of such devices enabled the first single-chip microprocessor communicating directly using light. 6 The optical components operate at a wavelength of 1180 nm for optimal responsivity of the photodiodes and for achieving a better confinement in the sub-100 nm thick crystalline silicon layer.
For increasing the responsivity of the surface-illuminated test photodiodes, we have exploited silicon-germanium (SiGe) stripes as active regions, inset in Fig. 2(a). The SiGe is normally utilized in the 45nm 12SOI process for increasing the carrier mobility in pFETs through compressive strain, is heteroepitaxially grown in silicon pockets and has an estimated germanium atomic content of 25% -35%. Interdigitated n-well and p-well implants contact the SiGe stripes and act as charge collectors, Fig. 2(a). All photodiodes have a square cross-section and have size 10 µm × 10 µm or nodes is generally not transparent because of the presence of dense metal wires or of damascene metal structures which fill all the unused space, we used special design layers (exclude-layers) to define pyramidal openings in the BEOL stack having a size up to 30 µm × 30 µm and 25 µm × 25 µm (on the top metal layer) centered around the large and the small photodiodes respectively, Fig. 2(a). The current-voltage characteristics of the three devices are shown in Fig. 2(b) under 15 dBm illumination at a wavelength of 1180 nm. The presence of SiGe increases the responsivity by a factor of 22 as compared to only-silicon detectors at 0 V bias. The dark current is smaller than 10 pA for all devices in the -2 V to 0 V range. The dark current is significantly lower than those of germanium photodiodes demonstrated in modified processes, which is typically four orders of magnitude larger for similar device dimensions at a bias voltage of -1 V. 22 The small dark current is attributed to a low density of defects and dislocations. 19 FIG  The photocurrent was then recorded as the fiber was moved along the direction parallel to the SiGe stripes, Fig. 2(b). For an optical power of 15 dBm and 0 V bias, the widest photodiode has a field-of-view of 40 µm at a 1 nA current threshold and 120 µm at a 10 pA threshold.
In the remaining of the paper we describe a packaging concept which takes advantage of such photodiodes and we will assume that the overall mechanical precision of the packaging assembly (which defines the initial alignment tolerances) is better than 100 µm. A possible configuration of the alignment-photodiodes is shown in Fig. 3(a). Here, four 10 µm × 10 µm SiGe photodiodes are placed on the vertices of a square with 40 µm edges so that the system would generate a current larger than 1 nA for alignment inaccuracies of up to ±40 µm (or 10 pA for ±100 µm). By placing FIG. 4. Representation of an optical socket. The silicon chip is fixed in a movable ceramics with the electrical contacts on the top side, and a grating coupler array on the bottom side. This ceramics is suspended through flexible wires transporting electrical power, clock signal and minimal data. These wires are connected to an outer ceramics fixed on the board. Two linear actuators are in charge of moving the inner ceramics in the plane. A third actuator enables rotation adjustments. Piezoelectric actuators having a 10 mm in length, 100 V operation voltage and 10 µm travel are readily available. A screw (not shown) inserted in the external ceramics in series with each piezoelectric actuator enables a one-time rough alignment feed backed by the photodiodes for up to few hundreds of micrometers in travel. The silicon chip may consist of a silicon-on-insulator (SOI) die with released silicon substrate at the location of the grating coupler array. 6 The silicon body is in contact to the heat sink which passes through both the printed circuit board (PCB) and the optical circuit board (OCB).