Effect of AlN growth temperature on trap densities of in-situ metal-organic chemical vapor deposition grown AlN/AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors

The trapping properties of in-situ metal-organic chemical vapor deposition (MOCVD) grown AlN/AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors (MIS-HFETs) with AlN layers grown at 600 and 700 °C has been quantitatively analyzed by frequency dependent parallel conductance technique. Both the devices exhibited two kinds of traps densities, due to AlN (DT-AlN) and AlGaN layers (DT-AlGaN) respectively. The MIS-HFET grown at 600 °C showed a minimum DT-AlN and DT-AlGaN of 1.1 x 1011 and 1.2 x 1010 cm-2eV-1 at energy levels (ET) -0.47 and -0.36 eV. Further, the gate-lag measurements on these devices revealed less degradation ∼ ≤ 5% in drain current density (Ids-max). Meanwhile, MIS-HFET grown at 700 °C had more degradation in Ids-max ∼26 %, due to high DT-AlN and DT-AlGaN of 3.4 x 1012 and 5 x 1011 cm-2eV-1 positioned around similar ET. The results shows MIS-HFET grown at 600 °C had better device characteristics with trap densities one order of magnitude lower than MIS-HFET grown a...


I. INTRODUCTION
AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors (MIS-HFETs) grown on silicon are of immense interest due to its low cost substrate, improved performance in high-power and high-frequency areas. [1][2][3] The merits of AlGaN/GaN-MIS technology are that it offers a wider gate voltage swing, reduced gate leakage and enhanced breakdown voltage, which are highly desirable for high power operations. A wide variety of materials have been employed as gate insulators and passivating material to improve the device reliability and performance. [4][5][6][7] On the other hand, the lack of high quality native oxide (Ga 2 O 3 ) as well as the traps associated in using these foreign/ex-situ grown insulators for GaN MIS-devices can adversely hamper the drain current density (I ds-max ) under pulsed conditions. It is difficult to modulate/mitigate the traps associated with AlGaN/GaN MIS interface; 8-10 that leads to current collapse. 11 On contrast, in-situ MOCVD grown AlN layer can be a promising gate insulator for GaN based MIS-HFETs, for its reduced lattice mismatch over AlGaN/GaN heterostructure and high dielectric constant.
Recently, in-situ MOCVD grown AlN/AlGaN/GaN MIS-HFET with the AlN layer growth temperature (T G ) of 600 • C has been demonstrated with better device properties than the conventional HFET. 12 However, detailed studies on trap states of in-situ MOCVD grown AlN/AlGaN/GaN MIS-HFETs as a variation of AlN layer T G are necessary to understand the potential utilization of AlN layer in GaN based MIS-devices. By using frequency dependent parallel conductance/angular frequency (G p/ω ) technique reported earlier, it is feasible to locate the trap states in AlN/AlGaN/GaN MISHs. Further, this technique can also be extended to study traps in AlGaN/GaN based heterostructures with different barrier thickness and alloy compositions. Frequency dependent conductance technique is the most reliable method for investigation of trapping effects, 14 which can effectively locate the traps in Al x Ga 1-x N/GaN heterostructures. [15][16][17] In this study, we have quantitatively analyzed the trap states of in-situ MOCVD grown AlN/AlGaN/GaN MIS-HFETs using AlN layers grown at two different temperatures.

II. EXPERIMENTS
The AlN/AlGaN/GaN MISHs were grown using Taiyo Nippon Sanso, SR 4000 MOCVD system. The MISHs consists of an undoped 5 nm AlN top layer, 15 nm Al 0.10 Ga 0.90 N layer, 1 μm intrinsic GaN layer, a super lattice structure (SLS) of 4 μm grown over 4 inch p-type silicon substrate.
To analyze the effect of AlN layer T G on trap densities (D T ), the active material structure of both the MISHs were same while the T G of AlN layer alone was fixed as 600 and 700 • C. The MISHs with AlN grown at 600 and 700 • C will be referred as MIS-diodes/HFETs A and B herein. Van der Pauw-Hall measurement was performed to measure Hall mobilities and sheet carrier densities of these MISHs. The room temperature Hall mobilities of MISHs A and B were 918 and 892 cm 2 /V.s, while the carrier densities were 0.65 and 0.48 X 10 13 cm -2 respectively. The MIS-devices fabrication started with mesa isolation using BCl 3 plasma based Reactive Ion etching (RIE). A 100 nm thick electron beam evaporated SiO 2 was used for device passivation. Ohmic patterns were performed using conventional UV-photolithography followed by metallization of Ti/Al/Ni/Au (15/80/12/40 nm). Prior to ohmic metallization, the SiO 2 in the ohmic access region was wet etched using HF based buffer and the surface was cleaned by using HCl solution. The Ohmic contacts were annealed at 850 • C using infra-red lamp annealing for 30s in N 2 ambient. Finally, gate metals Pd/Ti/Au (40/20/60 nm) were deposited directly on the AlN layer followed by conventional lift off procedures. Circular shaped MIS-diodes of uniform area (7.07 x10 -4 cm 2 ) were used for the conductance measurements. The schematic representation of the fabricated MIS-HFET/diode is shown in Fig. 1.
Electrical characterizations on these devices were carried out using Agilent B1505 power device analyzer/curve tracer set up interfaced with a shock proof probe station. The capacitance (C-V) and conductance (G-V) measurements were performed by sweeping the gate voltage (V g ) from accumulation to depletion regime, between frequency ranges of 1 kHz to 5 MHz. The amplitude of ac signal was fixed as 30 mV and the measurement period was long, so that small signal conditions were maintained.

III. RESULTS AND DISCUSSIONS
Typical C-V and G-V characteristics measured at 100 kHz for MIS diodes A and B are shown in Fig. 2. The C-V curves show a sharp transition from depletion to accumulation regime for both Nevertheless, a threshold voltage shift of ( V th = -0.3 V) and zero bias capacitance as well as conductance differences between the two MIS-diodes indicate priori information about variations in AlGaN (bulk related) and AlN traps. The frequency dependent capacitance dispersion in pinch-on region is due to the surface status while the pinch-off capacitance dispersions are due to bulk traps. 18 To evaluate the trap states quantitatively, the (G p/ω )values near the depletion region were calculated according to the expression, 2,14 Gp where C b is the barrier capacitance, G m and C m are the measured conductance and capacitance respectively. The relation between G p /ω and the ω is given by the equation, where D T , τ T are the trap densities and trap time constants, that are parameters evaluated theoretically by fitting the experimental G p /ω values. Both D T-AlN and D T-AlGaN can be quantified from the G p /ω peak magnitude, while the τ T can be located from the peak position of G p /ω. By comparing the fitting results of MIS-diodes, we observed both D T-AlN and D T-AlGaN of MIS-diode A is one order lower in magnitude than B. In the fitting process for V g ≤ V th , similar trend was observed for both the MIS-diodes. Moreover, the fitting curve (1+2) at the cross over region (denoted by a dashed line in Figs. 3(a) and 3(b)) were relatively broader than the experimental G p /ω values in the case of MIS-diode B compared to A. This phenomenon was also observed for AlN/AlGaN/GaN MISHs grown relatively at high temperature T G ≥ 1000 • C. 13 This is due to the asymmetric behavior of experimental G p /ω values caused by a high D T-AlGaN for MIS-diodes with AlN layers grown at high temperatures. Nevertheless, these in-situ AlN/AlGaN/GaN MISHs exhibited two trap states with distinct time constants irrespective of their AlN layer T G . Therefore, the present G p/ω studies suggests a good AlN/AlGaN heterointerface due to low temperature in-situ grown AlN layer. As evident, this kind of traps response had also been observed in the case of SiO 2 /Si MIS-devices using parallel conductance experiments. 19,20 All In the case of MIS-diode A, both τ T-AlN and τ T-AlGaN showed better exponential dependencies on V g than MIS-diode B. An exponential dependency of τ T on V g manifests uniformities in the trap states of MIS-diode A than B. A broader conductance curve and a deviation from exponential dependence (τ T ∝ V g ) can be observed if surface potential fluctuation due to some non-uniformity in the oxide (Insulator) and/or interface traps exits. 16 The τ T-AlN values for MIS-diodes A and B was in the range of (14 μs -0.3 ms) and (0.1 -0.2 ms). On the other hand, τ T-AlGaN for MIS-diodes A and B were between (2 -6 μs) and (5 -8 μs) respectively. These τ T-AlN and τ T-AlGaN are consistent with the τ T ranges generally reported for AlN related traps, 21 and AlGaN related bulk traps. 3 The trap state energy level (E T ) is proportional to the τ T , and therefore it can be deduced using the expression, In the above equation, k is the Boltzman constant, T is the temperature at which C-V and G-V were measured, σ T is the capture cross section of the traps, N C is the density of states in the conduction band and υ T is the average thermal velocity of the carriers. The E T values were calculated by using temperature of AlN is also preferred for preventing tensile strain-induced cracking of AlN layer, low gate leakage and better device performance with good passivation of AlGaN surface. 12,22,23 To investigate the influence of these traps on device characteristics, MIS-HFETs were also fabricated simultaneously and subjected to output I ds -V ds characteristics in DC and pulsed conditions. The difference in I ds -V ds characteristics in DC and pulsed mode is referred as gate-lag and are commonly related to surface traps. 24,25 In this method, we applied a trap filling short pulses of 500 μs to the AlN insulated gate with duration of 50 ms. Under pulsing condition, the gate was quiescent biased at -5 V (V gs-q < V th) and the drain current was measured. Figs. 6(a) and 6(b) shows the current collapse observed on MIS-HFETs A and B respectively. The DC I ds-max of MIS-HFET A was perhaps slightly lower than B, due to increase in ohmic contact resistance. This can be overcome by recess etching and making ohmic contacts in the AlGaN layer. 26 However, under gate stress conditions the MIS-HFET A showed less degradation of I ds-max than MIS-HFET B. Figure 7 shows the I ds-max degradation (in %) as observed from gate-lag measurements for MIS-HFETs A and B respectively. The MIS-HFET B showed a large decline of I ds-max (∼26 %) with an increased on state resistance (R on ) of 33 % under gate stress conditions. On the other hand, the MIS-HFET A showed a less degradation of I ds-max (≤5 %) and R on of 0.75 % under gate stress conditions. This can be attributed to the combination of effective passivation of AlGaN surface states and/or the low interface density due to the AlN layer grown at low temperature. 12,18,25,26 In addition, the three terminal off-state breakdown voltage (BV) measurements on these devices revealed a high BV ∼302 V for MIS-HFET A in contrast to a low BV ∼ 274 V for MIS-HFET B (see supplementary material for three terminal off state BV characteristics). 27 This can be explained on the basis that high trap state density in MIS-HFET B was accompanied by high electric field and a low BV. The breakdown voltage decreases with increase in defect states. 28 These results shows that low temperature (T G ∼600 • C) in-situ MOCVD grown AlN layer offers better device characteristics under gate-stress conditions and high BV due to less defect states as observed from the conductance measurements.

IV. CONCLUSIONS
In summary, the trapping properties of in-situ MOCVD grown AlN/AlGaN/GaN MIS-HFETs with AlN layers grown at 600 and 700 • C has been quantitatively analyzed by frequency dependent conductance technique. The AlN and AlGaN related traps were identified for both the devices and were one order of magnitude lower for MIS-FET grown at 600 • C. They exhibited a minimum D T-AlN and D T-AlGaN of 1.1 x 10 11 and 1.2 x 10 10 cm -2 eV -1 with characteristic energy levels at -0.47 and -0.36 eV below the conduction band. Further, gate-lag results revealed less (≤5 %) degradation of I ds-max compared to the MIS-FET grown at 700 • C which exhibited (∼26 %) degradation of I ds-max due high D T-AlN and D T-AlGaN of 3.4 x 10 12 and 5 x 10 11 cm -2 eV -1 located around similar energy levels. A high BV of 302 V was also observed for MIS-HFET with AlN layer grown at 600 • C. These studies indicate that low temperature growth of AlN layer can favour lesser defect prone AlN based AlGaN/GaN MIS-HFETs.

ACKNOWLEDGMENTS
The author (J. J. F) duly acknowledges the Ministry of Education, Culture, Sports, Science and Technology (MEXT), Government of Japan for the award of the doctoral fellowship (Grant No. 090028).