CMOS gate stack continues to scale to smaller dimensions, new materials must be introduced into the stack to keep pace with design requirements. One way to measure the properties of new materials systems is through the use of high‐throughput experimentation, called combinatorial methodology. We describe two examples of combinatorial experimental design for CMOS. In the first, we will demonstrate library design and growth of Al‐Hf‐Y‐O films for high‐k applications. In the second, we will demonstrate Ni‐Ti‐Pt metal gate libraries for Si/Hf02/metal gate electrode applications.
- © 2007 American Institute of Physics.
Web of Science
Please Note: The number of views represents the full text views from December 2016 to date. Article views prior to December 2016 are not included.